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MP2269 3.3v - 30v, 1a, 12 a i q , synchronous , step - down converter with external soft start and power good in 2x3mm qfn package MP2269 rev. 1 .0 www.monolithicpower.com 1 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. description the MP2269 i s a frequency - programmable ( 3 5 0k hz to 2. 5 mhz ) , synchronous , step - down , switching regulator with integrated , internal , high - side and low - side power mosfet s . the MP2269 provides 1 a of highly efficient output current with current - mode control for fast loop response. the wide 3.3v to 30 v input range accommodates a variety of step - down applications. a 1 a shutdown mode quiescent current allows the MP2269 to be use d in battery - powered applications. high power conversion efficiency over a wide load range is achieved by scaling down the switching frequency at light - load condition to reduce switching an d gate driving losses. an open - drain power good signal indicates the output signal . frequency fold back helps prevent inductor current runaway during start - up. thermal shutdown provides reliable and fault - tolerant operation. high duty cycle and low d rop - out mode are provided for b attery - p owered s ystems . the MP2269 is available in a qfn - 1 5 (2mmx3mm) package . features ? wide 3.3v to 30 v operating voltage range ? 1 a c ontinuous o utput c urrent ? 1 a low shutdown supply current ? 1 2 a sleep m ode quiescent current ? 18 0 m / 80 m high - side / low - side r ds(on) for internal power mosfets ? 3 50khz to 2. 5 mhz programmable switching frequency ? power good output ? external soft start ? 8 0ns m inimum o n t ime ? selectable forced pwm mode and auto pf m /pwm mode ? low dropout mode ? hiccup o ver - c urrent p rotection (ocp) ? available in a qfn - 15 (2mmx3mm) package applications ? battery - powered systems ? smart home s ? wide input range power suppl ies ? standby power suppl ies all mps parts a re lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit the mps website under quality assurance. mps and the future of analog ic technology are registered trademarks of monolithic power systems, inc. typica l application m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 1 0 f r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 4 1 f l 1 6 . 5 h c 2 2 2 f 2 r 1 1 m r 2 3 2 4 k e n p g 3 . 3 v / 1 a m o d e b i a s
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 2 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ordering information part number * package top marking MP2269 gd qfn - 15 (2mm x 3mm) see below * for tape & reel, add suffix C z (e.g. MP2269 gd C z) top marking auh : product code of MP2269 g d y: year code w w : week code lll: lot number package reference top view qfn - 15 (2mmx3mm) 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 m o d e v i n p g n d e n n c p g b i a s p g n d s w b s t v c c a g n d s s f b f r e q
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 3 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. absolute maximum rat ings (1) supply voltage ( v in ) ...................... - 0.3v to 40 v switch voltage (v sw ) ...... - 0.3v to v in (max) + 0.3v bst volta ge (v bst ) ..................... v sw (max) + 6.5 v en voltage (v e n ) ............................ - 0.3v to 40 v pg voltage ................................ ..... - 0.3v to 32 v bias voltage ................................ .. - 0.3v to 20 v all other pins ................................ .... - 0.3v to 6 v continuous power dissipation ( t a = +25 c ) (2) qfn - 15 (2mmx3mm) ................................ . 1.7 w operating junction temperature ................ 1 5 0 c lead tempe rature ................................ .... 260 c storage temperature .................. - 65c to 150 c recommended operating conditions ( 3 ) supply voltage ( v in ) ....................... 3.3v to 30 v operating junct ion temp (t j ) .... - 40 c to + 125 c thermal resistance ( 4 ) ja jc qfn - 15 (2mmx3mm) ............ 70 ....... 15 ... c/w notes : 1) absolute maximum ratings are rated under room temperature u nless otherwise noted. exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction tempe rature t j (max), the junction - to - ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max) - t a )/ ja . exceeding the maximum allowable pow er dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51 - 7, 4 - layer pcb .
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 4 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical character istics v in = 12v, v en = 2v, t j = - 40 c to + 1 25 c (5) , t ypical values are at t j = +25 c , unless otherwise noted. parameter symbol condition min typ max units vin under - v oltage lockout threshold rising inuv vth 2.5 2.8 3.2 v vin under - voltage lockout threshold hysteresis inuv hys 150 mv vin quiescent current i q fb = 0.85v, no load , sleep mode 1 2 a vin shutdown current i shdn en = 0v 1 5 a fb voltage v fb t j = - 40 c to +1 25 c 784 800 816 m v t j = 25 c 792 800 808 m v switching frequency f sw r freq = 164k 425 500 575 khz r freq = 8 2 k 850 1000 1150 khz r freq = 27 k 2250 2500 2750 k hz minimum on time (6) t on _ min 80 ns switch current limit i limit _ hs duty cycle = 4 0% 2.5 a valley current limit i limit _ ls v out = 3.3v, l = 6.5 h 1.35 a zcd cu rrent i zcd 50 m a ls reverse current limit i limit _ reverse 1.5 a switch leakage current i sw _ lkg 0.01 1 a hs switch on resistance r on _ hs v bst - v sw = 5v 180 m ls switch on resistance r on _ ls 80 m soft - start current i ss v ss = 0 .8 v 5 10 15 a en rising threshold voltage v en _ rising 0.9 1. 05 1. 2 v en hysteresis voltage v en _ hys 1 1 0 mv pg ov rising (v fb /0.8v) pg vth_ov _ rising 105 110 11 5 % pg ov falling (v fb /0.8v) pg vth_ov _ falling 113.5 118 12 3 .5 % pg uv r i sing (v fb /0.8v) pg vth_ u v_rising 85 90 9 5 % pg uv falling (v fb /0.8v) pg vth_ u v_falling 79 84 8 9 % pg output voltage lo w v pg _ low i sink = 2 ma 0. 2 0. 4 v pg deglitch timer rising t pg _ deglitch _rising 3 4 s pg deglitch timer falling t pg _ deglitch _falling 57 s thermal shutdown (6) t sd 1 70 ? c thermal shutdown hysteresis (6) t sd _ hys 20 c note: 5) not tested in production. guaranteed by over - temperature correlation . 6) gu aranteed by characterization test .
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 5 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions pin # qfn - 15 (2mmx3mm) name description 1 mode mode selection. pull mode low or float mode to set auto pfm /pwm mode; pull mode high to set forced pwm mode. mode is pull ed down internal ly . select mode before the part start s up. 2 vin input supply . vin supplies power to all the internal control circuitr ies and the power switch connected to sw. a decoupling capacitor to gro und must be placed close to vin to minimize switching spikes. 3, 8 p gnd power ground . 4 en enable. pull en below the specified threshold to shut down the MP2269 . pull en up above the specified threshold to enable the mp22 69 . 5 nc no connection . leave nc float ing . 6 pg power good output . t he output of pg is an open drain. 7 bias bias input . bias must be connected to gnd if the bias function is not being used . 9 sw switch node. sw is the output of th e internal power switch. 10 bst bootstrap. bst is the positive power supply for the high - side mosfet driver connected to sw . connect a bypass capacitor between bst and sw. 11 vcc internal ldo output . vcc supplies power to the internal control c ircuit and gate drivers. a d ecoupling capacitor to ground is required close to vcc . 12 agnd analog ground . 13 ss s oft - s tart input . place a capacitor from ss to gnd to set the soft - start period. the MP2269 sources 10 a from ss to the soft - start ca pacitor during start - up. as the ss voltage rises, the feedback threshold voltage increases to limit inrush current during start - up. 14 fb feedback input . c onnect fb to the center point of the external resistor divider. the feedback threshold voltage is 0.8 v. 15 freq switching frequency set . connect a resistor from freq to ground to set the switching frequency.
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 6 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l = 6.5 h , f sw = 500khz, c ss = 12nf, t a = 25c, bias is connected to gnd, unless otherwise noted.
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 7 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l = 6.5 h, f sw = 500khz, c ss = 12nf, t a = 25c, bias is connected to gnd, unless otherwise noted.
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 8 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v , l = 6.5 h, f sw = 500khz, c ss = 12nf, t a = 25c, bias is connected to gnd, unless otherwise noted.
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 9 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l = 6.5 h, f sw = 500khz, c ss = 12nf, t a = 25c, bias is connected to gnd, unless otherwise noted.
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1 .0 www.monolithicpower.com 10 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. block diagram figure 1 : functional block diagram o s c i l l a t o r r e f e r e n c e e r r o r a m p l i f i e r c o n t r o l l o g i c , o c p , o t p , b s t r e f r e s h , f b p g n d s w b s t v i n e n p g v r e f v r e f i s w + + - s s + - v r e f v c c v f b v f b v c c v c c v c c r e g u l a t o r i r e v e r s e b i a s f r e q b s t r e g u l a t o r a g n d m o d e
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1.0 www.monolithicpower.com 11 10/11/2016 m ps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. operation the MP2269 is a synchronous , step - down , switc hing regulator with integrated , internal , high - side and low - side power mosfet s . it provides 1 a of highly efficient output current with current - mode control. the MP2269 features a wide input voltage range, programmable 3 50khz to 2. 5 mhz switching frequency, external soft start , and current limit. its very low operational quiescent current makes it suitable for battery - powered applications. pwm control at moderate - to - high output current s , the MP2269 operates in a fixed - fr equency, peak - current - control mode to regulate the output voltage. a pwm cycle is initiated by the internal clock. a t the ris ing edge of the clock, t he high - side power mosfet (hs - fet) is turned on and remains on until its current reaches the value set by the comp voltage (v comp ) . when the high - side power switch is off, the low - side mosfet (ls - fet) is turned on and remains on until the next cycle begins . if the current in the hs - fet does not reach the comp - set current value in one pwm period , the hs - fet remains on, saving a turn - off operation. advanced asynchronous mode ( aam ) the MP2269 employs advanced asynchronous mode ( aam ) functionality to optimize efficiency during light - load or no - load conditions. aam mode is selectable . enable aam by connecting mode to a low level or float ing mode; disable aam by connect ing mode to a high level. i f aam is enabled , the MP2269 first enter s non - synchronous operation for as long as the inductor current approaches zero at l ight load. if the load is further decreased or is at no load , v comp is below v aam , and the mp226 9 enter s a am or sleep mode, which consum es very low quiescent current and improve s light - load efficiency further . in aam , t he internal clock is reset whenever v comp crosses over v aam , and th e crossover time is taken as the benchmark for the next clock. when the load increases , and the dc value of v comp is higher than v aam , the operation mode is dcm or ccm , which have a constant switching frequency. fig ure 2 : aam and pwm mode the MP2269 has a mode selection function (see figure 2) . pull mode low or float mode to set auto pfm/pwm mode . pull mode high to set forced pwm mode. mode is pulled down internally . select mode before the part start s up . error amplifier (ea) the error amplifier (ea) compares the fb voltage with the internal reference ( typically 0.8v ) and outputs a current proportional to the difference betw een the two. this output current is used to charge the int ernal compensation network to form v comp , which is used to control the power mosfet current. bias and vcc regulator most of the internal circuitry is powered by the internal regulator. the MP2269 has two internal regulators ( see f igure 3 ) . the regulator ldo1 takes the vin input and operates in the full vin range. when vin is greater than 5 v, the output of the regulator is in full regulation , and vcc is 5v . when vin is low er than 5v , the output degrades. another regulator , ldo2 , is powered by bias. c onnect bias to an external power source, and keep the bias voltage higher than 4. 8 v . vcc and the internal circuit are then powered by bias. when v bias i s greater than 5v, the output of the regulator is in full regulation, and vcc is 5v. when v bias is lower than 5v , the output degrades. ldo2 is enabled when v bias > 4. 8 v. once ldo2 is enabled, ldo1 is disabled. for a 5v out put application, b ias is reco mmended to be connect ed to v out for improved efficiency . the diode ( d1 ) between bias and the internal circuit is used for reverse block ing . since ldo1 has no r everse block function, v bias must be less than v in . c onnect bias to gnd if bias is not used. a a m ( m o d e = l o w ) i n d u c t o r c u r r e n t t t t l o a d d e c r e a s e d p w m m o d e ( m o d e = h i g h ) i n d u c t o r c u r r e n t t t t l o a d d e c r e a s e d
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev . 1 .0 www.monolithicpower.com 12 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. figure 3 : vcc regulator bootstrap charging the bootstrap capacitor is charged and regulated to about 5v by the dedicated internal bootstrap regulator. when the voltage between the bst and sw node s is lower than its regulation, a pmos connected from v cc to bst is turned on. the charging current path is from v cc to bst to sw. when the hs - fet is on , vin is about equal to sw , so the bootstrap capacitor cannot be charged. at higher duty cycle operation condition s , the time period available to the bootstrap charging is less , so the bootstrap capacitor may not be charged sufficiently. if the internal circuit does not have sufficient voltage or time to charge the bootstrap ca pacitor, extra external circuitry can be used to ensure that the bootstrap voltage is in the normal operation region. low - dropout operation to improve drop out, the MP2269 is designed to operate at almost 100% duty cycle as long as the b s t to sw voltage is greater than 2. 5 v. when the voltage from bst to sw drops below 2. 5 v, the hs - fet is turned off using an under - voltage lockout ( uvlo ) circuit that allows the l s - fet to conduct and refresh the charge on th e bst capacitor. in dcm or psm , the ls - fet is forced on to refresh the bst voltage. since the supply current sourced from the bst capacitor is low, the hs - fet can remain on for more switching cycles than are required to refresh the capacitor, making the effective duty cycle of the switching regulator high. the effective duty cycle during the dropout of the regulator is mainly influenced by the voltage drops across the power mosfet, inductor resistance, low - side diode , and printed circuit board resistance. enable (en) control en is a digital control pin that turns the regulator on and off. en can be enabled by an external logic h/l signal . when en is pulled below the threshold voltage , the chip is put into the low est shutdown current mode. forcing en above the en threshold voltage turns on the part. for the programmable vin under - voltage lockout ( uvlo ) , w ith a high - enough vin, the chip can be enabled and disabled by en ( see figure 4 ) . t his circ uit can generate a programmable vin uvlo and hysteresis. figure 4 : enable divider circuit frequency programmable the MP2269 oscillating frequency is programmed by an external resistor ( r freq ) from freq to ground . the approximate v alue of r freq can be calculated with equation (1) : (1) l d o 1 l d o 2 v i n b i a s v c c e n 1 e n 2 d 1 e n v i n r e n 1 r e n 2 freq s 86500 r (k ) 6.5 f (khz) ? ? ?
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1.0 www.monolithicpower.com 13 10/11/2016 m ps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. soft start (ss) soft start (ss) is implemented to prevent the converter output voltage from overshooting during start - up. when the soft - start period begins , an internal current source begins charging the external soft - start capacitor. after the soft - start voltage (ss) charges higher than the internal offset voltage ( typically 600mv ), v out starts up . when ( ss - v offest )/1.125 is lower than t he internal reference (ref), the error amplifier uses ( ss - v offest )/1.125 as the reference. when ( ss - v offest )/1.125 is higher than ref, ref regains control. c ss can be calculated with equation (2): (2) the minimum t ss is 800 s, typ ically . pre - bias s tart - up the MP2269 has been designed for monotonic start - up into pre - biased loads. if the output is pre - biased to a certain voltage during start - up, the bst voltage is refreshed and charged . the voltage on the soft - sta rt capacitor is charged as well . if the bst voltage exceeds its rising threshold voltage , and the soft - start capacitor voltage exceeds 1.125*v fb +v offest , the part begins work ing normally. thermal shutdown thermal shutdown is implemente d to prevent the chip from running away thermally . when the silicon die temperature is higher than its upper threshold, the power mosfets are shut down . when the temperature is lower than its lower threshold, thermal shutdown is removed, and the chip is enabled again. current comparator and current limit the power mosfet current is accurately sensed via a current sense mosfet. the current is then fed to the high - speed current comparator for current - mode control purp ose s . the current comparator uses this sensed current as one of its inputs. when the hs - fet is turned on, the comparator is first blanked until the end of the turn - on transition to avoid noise. then, the comparator c ompares the power switch current with v comp . when the sensed current is higher than v comp , the comparator outputs low to turn off the hs - fet. the maximum current of the internal power mosfet is limited cycle - by - cycle internally . hiccup protection when the output is shorted to ground, causing the output voltage to drop below 70% of its nominal output, the ic shut s down momentarily and begins discharging the soft - start capacitor. the ic restart s with a full soft start when the soft - start capacitor is fully discharged. this hiccup process is repeated until the fault is removed. start - up and shutdown if both vin and e n are higher than their respective thresholds , the chip starts up . the reference block starts first, generating a stable reference voltage and current , and then the internal regulator is enabled. the regulator provides a stable supply for the rest of the circuitries. while the internal supply rail starts up, an internal timer holds the power mosfet off for about 50 s to blank the start - up glitches. when the soft - start block is enabled, it first holds its ss output low to ensure that the r est of the circuitries are ready and then ramps up slowly . three events can shut down the chip: en low, vin low, and thermal shutdown. in the shutdown procedure, the signaling path is blocked first to avoid any fault triggering. v comp and t he internal supply rail are then pulled down . the floating driver is not subject to this shutdown command , but its charging path is disabled. power good (pg) output the MP2269 has an open - drain pin as the power good indicator (pg) . pg can indicate und er - voltage ( uv ) and over - voltage ( ov ) . pull pg up to vcc through a 100k ? resistor. at the uv condition, when v fb exceeds 90% of v ref , pg goes high . if v fb goes below 84 % of v ref , an internal mosfet pulls pg down to ground. at the ov condition, when v fb ex ceeds 118 % of v ref , pg goes high . if v fb goes below 110 % of v ref , pg goes low . ref tss(ms) iss( a) css(nf) 1.125 v (v) ?? ? ?
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1.0 www.mon olithicpower.com 14 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. application informat ion setting the output the external resistor divider is used to set the output voltage (see typical application on page 1) . choose r1 by refer ring to table 1 . r2 can then be calculated with equation (3) : (3) the feedback network is highly recommended ( see figure 5 ) . figure 5 : feedback network table 1 lists the recommended feedback network parameters for common output voltages. table 1 : recommended parameters for common output voltages (7 ) v out (v) r1 (k?) r2 (k?) c f (pf) 1.0 5 470 1500 5.6 1.2 750 1500 5.6 1.8 1000 806 5.6 2.5 1000 470 5.6 3.3 1 000 324 5.6 5 1000 191 5.6 notes : 7 ) the recommended parameters are ba sed on a 500khz switching frequency . a different input voltage, output inductor value, and output capacitor value may affect the selection of r1, r2, and c f . f or additional componen t parameters, please refer to the t ypical a pplication c ircuits on page s 1 7 and 1 8 . selecting the inductor for most applications, u se a 1h to 22 h inductor with a dc current rating at least 25% higher than the maximum load current. for highest efficiency , use an inductor with a dc resistance less than 15m?. for most designs, the inductance value can be derived from equation (4) : (4) where ? i l is the inductor ripple current . choose the inductor ripple curre nt at approximately 30% o f the maximum load current . the maximum inductor peak current is calculated with equation (5) : (5) selecting the input capacitor the input current to the step - down converter is discontinuou s and therefore requires a capacitor to supply ac current while maintaining the dc input voltage. use low esr capacitors for the best performance. ceramic capacitors with x5r or x7r dielectrics ar e recommended because o f their low esr and small temperature coefficien ts. for most applications, use one 10 f capacitor. since c1 absorbs the input switching current, it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated w ith equation (6) : (6) the wors t - case condition occurs at v in = 2v out , shown in equation (7) : (7) for simplification, choose an input capacitor with a n rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum , or ceramic. when using electrolytic or tantalum capacitors, a small, high - quality ceramic capacitor (e.g. : 0.1f) should be placed as close to the ic as possible. when using ceram ic capacitors, en sure that they have enough capacitance to provide a sufficient charge to prevent excessive voltage ripple at the input. out r1 r2 v 1 0.8v ? ? out in out 1 in l osc v (v v ) l v i f ?? ? ? ? ? 2 i i i l load ) max ( l ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? in out in out load 1 c v v 1 v v i i 2 i i load 1 c ?
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1.0 www.monolithicpower.com 15 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. the input voltage ripple caused by the capacitance can be estimated w ith equation (8) : (8) selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low esr electrolytic capacitors. for best results, use low esr capacitors to keep the output voltage ripple low. the output vo ltage ripple can be estimated with equation (9) : (9) where l 1 is the inductor value , and r esr is the equivalent series resistance (esr) value of the output capacitor. for ceramic capacitors, the capacitance dominates the impe dance at the switching frequency , and the capacitance causes the majority of the output voltage ripple. for simplification, the output voltage ripple can be estimated with equation (10) : (10) for tantalum or electrolytic cap acitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated with equation (11) : (11) the characteristics of the output capacitor affect the stability of the r egulation system. the MP2269 can be optimized for a wide range of capacitance and esr values. pc b layout guidelines (8 ) efficient pcb layout is critical for stable operation. for best results, refer to figure 6 and follow the guidelines below. 1. keep the connection of the input ground and gnd as short and wide as possible. 2. keep the connection of the input capacitor and v in as short and wide as possible . 3. ensure all feedback connections are short and direct. 4. place the feedback resistors and compensation components as close to the chip as possible. 5. route sw away from sensitive analog areas such as fb. notes : 8 ) the recommended layout is based on the typical application circuit on page 17 and page 18 . top layer bottom layer figure 6 : sample pcb layout load out out in in s in i v v v1 f c1 v v ?? ? ? ? ? ? ?? ? ?? out out out esr s 1 in s vv 1 v 1 r f l v 8 f c2 ?? ?? ? ? ? ? ? ? ?? ?? ? ? ? ?? ?? out out out 2 in s1 vv v 1 v 8 f l c2 ?? ? ? ? ?? ? ? ? ?? out out out esr in s1 vv v 1 r f l v ?? ? ? ? ? ?? ? ?? g n d g n d v o u t v i n g n d v o u t v c c p g e n
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev . 1 .0 www.monolithicpower.com 16 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. design example table 2 shows a design example following the application guid elines for the specifications below. table 2 : design example v in 12 v v out 3.3 v i out 1 a the detailed application schematic is shown in fig ure 7 through figure 12 . the typical performance and circuit waveforms are shown in the typical perfo r mance characteristics section. for additional device applications, please refer to the related evaluation board data sheet .
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev. 1.0 www.monolithicpower.com 17 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits (9) figure 7 : v in = 12 v, v out = 5 v figure 8 : v in = 12 v, v out = 3.3v figure 9 : v in = 12 v, v out = 2.5 v m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 c 0 . 1 f r 5 1 0 0 k c 1 a 1 0 f r 6 n s r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 7 n s c 4 1 f r 4 0 l 1 8 . 2 h c 2 a 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f r 7 1 0 r 1 1 m r 2 1 9 1 k c 6 5 . 6 p f r 8 0 e n p g 5 v / 1 a m o d e b i a s r 9 1 0 0 k 2 4 6 1 1 1 5 1 3 1 2 3 , 8 5 7 1 1 4 9 1 0 m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 c 0 . 1 f r 5 1 0 0 k c 1 a 1 0 f r 6 n s r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 7 n s c 4 1 f r 4 0 l 1 6 . 5 h c 2 a 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f r 7 1 0 r 1 1 m r 2 3 2 4 k c 6 5 . 6 p f r 8 0 e n p g 3 . 3 v / 1 a m o d e b i a s r 9 1 0 0 k 2 4 6 1 1 1 5 1 3 1 2 3 , 8 5 7 1 1 4 9 1 0 m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 c 0 . 1 f r 5 1 0 0 k c 1 a 1 0 f r 6 n s r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 7 n s c 4 1 f r 4 0 l 1 6 . 5 h c 2 a 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f r 7 1 0 r 1 1 m r 2 4 7 0 k c 6 5 . 6 p f r 8 0 e n p g 2 . 5 v / 1 a m o d e b i a s r 9 1 0 0 k 2 4 6 1 1 1 5 1 3 1 2 3 , 8 5 7 1 1 4 9 1 0
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter MP2269 rev . 1 .0 www.monolithicpower.com 18 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits (continued) figure 10 : v in = 12 v, v out = 1.8 v figure 11 : v in = 12 v, v out = 1.2 v figure 12 : v in = 12 v, v out = 1.05 v note : 9) to use the bias function, connect bias to a power source higher than 4.8v . if the bias function is not used, connect bias to gnd. m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 c 0 . 1 f r 5 1 0 0 k c 1 a 1 0 f r 6 n s r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 7 n s c 4 1 f r 4 0 l 1 5 . 6 h c 2 a 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f r 7 1 0 r 1 1 m r 2 8 0 6 k c 6 5 . 6 p f r 8 0 e n p g 1 . 8 v / 1 a m o d e b i a s r 9 1 0 0 k 2 4 6 1 1 1 5 1 3 1 2 3 , 8 5 7 1 1 4 9 1 0 m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 c 0 . 1 f r 5 1 0 0 k c 1 a 1 0 f r 6 n s r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 7 n s c 4 1 f r 4 0 l 1 4 . 2 h c 2 a 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f r 7 1 0 r 1 7 5 0 k r 2 1 . 5 m c 6 5 . 6 p f r 8 0 e n p g 1 . 2 v / 1 a m o d e b i a s r 9 1 0 0 k 2 4 6 1 1 1 5 1 3 1 2 3 , 8 5 7 1 1 4 9 1 0 m p 2 2 6 9 v i n e n v i n f r e q f b b s t v o u t s w p g n d n c v c c b i a s p g s s 1 2 v m o d e a g n d c 1 c 0 . 1 f r 5 1 0 0 k c 1 a 1 0 f r 6 n s r 3 1 6 5 k c 5 1 f c 3 1 2 n f c 7 n s c 4 1 f r 4 0 l 1 3 . 3 h c 2 a 2 2 f c 2 b 2 2 f c 2 c 0 . 1 f r 7 1 0 r 1 4 7 0 k r 2 1 . 5 m c 6 5 . 6 p f r 8 0 e n p g 1 . 0 5 v / 1 a m o d e b i a s r 9 1 0 0 k 2 4 6 1 1 1 5 1 3 1 2 3 , 8 5 7 1 1 4 9 1 0
MP2269 - 30 v , 1 a , low iq, synchronous step - down converter notice: the information in this document is subject to change without notice. please contact mps for current specifications. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP2269 rev. 1 .0 www.monolithicp ower.com 19 10/11/2016 mps proprietary information . patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information qfn - 15 (2mmx3mm) p a c k a g e o u t l i n e d r a w i n g f o r 1 5 l f c q f n ( 2 x 3 m m ) m f - p o - d - 0 x x x r e v i s i o n s i d e v i e w b o t t o m v i e w n o t e : 1 ) a l l d i m e n s i o n s a r e i n m i l l i m e t e r s . 2 ) e x p o s e d p a d d l e s i z e d o e s n o t i n c l u d e m o l d f l a s h . 3 ) l e a d c o p l a n a r i t y s h a l l b e 0 . 1 0 m i l l i m e t e r s m a x . 4 ) j e d e c r e f e r e n c e i s m o - 2 2 0 . 5 ) d r a w i n g i s n o t t o s c a l e . p i n 1 i d m a r k i n g t o p v i e w p i n 1 i d i n d e x a r e a r e c o m m e n d e d l a n d p a t t e r n p i n 1 i d 0 . 1 0 x 4 5 o t y p 0 . 1 0 x 4 5 o

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